11 offset registers (adofsn), 12 power control register (power), 11offset registers (adofs – Freescale Semiconductor ColdFire MCF52210 User Manual

Page 453: 12power control register (power) -17, 11 offset registers (adofs n )

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Analog-to-Digital Converter (ADC)

MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2

Freescale Semiconductor

26-17

26.4.11 Offset Registers (ADOFSn)

The values in the offset registers (ADOFSn) are subtracted from the raw ADC values, and the results are
stored in the ADRSLTn registers. To obtain unsigned results, the respective offset register must be
programmed with a value of 0x0 to yield a resulting range of 0x0 to 0x7FF8.

26.4.12 Power Control Register (POWER)

This register controls the power management features of the ADC module. There are manual power-down
control bits for the two ADC converters and the shared voltage reference generator. There are also 5
distinct power modes with related controls:

1. Powered-down state

Each converter and the voltage reference generator can individually be put into a powered down
state. When powered down, the unit consumes no power. Results of scans referencing a powered
down converter are undefined. The voltage reference generator and at least one converter must be
powered up to use the ADC module.

2. Manual power-down controls

Each converter and the voltage reference generator have a manual power control bit capable of
forcing that component into the power down state. Also, each converter and the voltage reference
generator can be powered up/down automatically as part of ADC operation.

3. Idle state

The ADC module is idle when neither of the two converters has a scan in process.

4. Active state

The ADC module is active when at least one of the two converters has a scan in process.

IPSBAR

Offsets:

0x19_0042 (ADOFS0)
0x19_0044 (ADOFS1)
0x19_0046 (ADOFS2)
0x19_0048 (ADOFS3)
0x19_004A (ADOFS4)
0x19_004C (ADOFS5)
0x19_004E (ADOFS6)
0x19_0050 (ADOFS7)

Access: read/write

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

R

0

OFFSET

0

0

0

W

Reset

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Figure 26-15. Offset Registers (ADOFSn)

Table 26-17. ADOFSn Field Descriptions

Field

Description

15

Reserved, should be cleared.

14–3

OFFSET

Offset value. This value is subtracted from the raw ADC value, and the result is stored in the respective
ADRSLTn register.

2–0

Reserved, should be cleared.

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