Freescale Semiconductor ColdFire MCF52210 User Manual

Page 458

Advertising
background image

Analog-to-Digital Converter (ADC)

MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2

26-22

Freescale Semiconductor

Parallel scan can be simultaneous or non-simultaneous. During simultaneous scan, the scans in the two
converters are done simultaneously and always result in simultaneous pairs of conversions, one by
converter A and one by converter B. The two converters share the same start, stop, sync, end-of-scan
interrupt enable control, and interrupt. Scanning in both converters is terminated when either converter
encounters a disabled sample. In non-simultaneous scan, the parallel scans in the two converters are
achieved independently. The two converters have their own start, stop, sync, end-of-scan interrupt enable
controls, and end-of-scan interrupts. Scanning in either converter terminates only when that converter
encounters a disabled sample in its part of SDIS register (DS0-DS3 for A, DS4-DS7 for B).

Figure 26-19. Parallel Mode Operation of the ADC

The ADC can be configured to perform a single scan and halt, perform a scan when triggered, or perform
the scan sequence repeatedly until manually stopped. The single scan (once mode) differs from the
triggered mode only in that SYNC input signals must be re-armed after each using a once mode scan, and
subsequent SYNC inputs are ignored until the SYNC input is re-armed. This arming can occur anytime
after the SYNC pulse occurs, even while the scan it initiated remains in process.

AN3

AN2

AN1

AN0

V+

V

REFL

Channel Select

V–

ADCA

12

Single-Ended vs

Crossbars do
not operate in

Differential

12

+

ADOFS[0:3]

13

Zero Crossing Logic

+

ADHLMT[4:7]

>

ADRSLT[0:3]

Zero Crossing
or Error Limit
Interrupt

ADLLMT[4:7]

<

12

12

+

ADOFS[4:7]

13

Zero Crossing Logic

+

ADRSLT[4:7]

12

AN7

AN6

AN5

AN4

V+

V

REFL

Channel Select

V–

ADCB

Single-Ended vs
Differential

12

ADHLMT[0:3]

>

ADLLMT[0:3]

<

Test Data

(From CPU)

Test Data

(From CPU)

ADC2

ADC1

ADC0

End of
Scan B
Interrupt

End of
Scan A
Interrupt

IRQ Logi

c

this mode

Advertising
This manual is related to the following products: