Freescale Semiconductor ColdFire MCF52210 - Manual (Page 68)

ColdFire Core
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
3-24 Freescale Semiconductor
Table 3-10. D1 Hardware Configuration Information Field Description
Field Description
31–30
CLSZ
Cache line size. This field is fixed to a hex value of 0x0 indicating a 16-byte cache line size.
29–28
CCAS Configurable cache associativity.
00
Four-way
01 Direct mapped (This is the value used for this device)
Else Reserved for future use
27–24
CCSZ Configurable cache size. Indicates the amount of instruction/data cache.The cache configuration options available
are 50% instruction/50% data, 100% instruction, or 100% data, and are specified in the CACR register.
0000 No configurable cache (This is the value used for this device)
0001 512B configurable cache
0010 1KB configurable cache
0011 2KB configurable cache
0100 4KB configurable cache
0101 8KB configurable cache
0110 16KB configurable cache
0111 32KB configurable cache
Else Reserved
23–20
FLASHSZ
Flash bank size.
0000-0111 No flash
1000 64-Kbyte flash
1001 128-Kbyte flash
1010 256-Kbyte flash (This is the value used for this device)
1011 512-Kbyte flash
Else Reserved for future use.
19–16 Reserved
15–14
MBSZ Bus size. Defines the width of the ColdFire master bus datapath.
00
32-bit system bus datapath (This is the value used for this device)
01 64-bit system bus datapath
Else Reserved
13–8 Reserved, resets to 0b010000
7–4
SRAMSZ
SRAM bank size.
0000 No SRAM
0001 512 bytes
0010 1 Kbytes
0011 2 Kbytes
0100 4 Kbytes
0101 8 Kbytes
0110 16 Kbytes
0111 32 Kbytes (This is the value used for this device)
1000 64 Kbytes
1001 128 Kbytes
Else Reserved for future use
3-0 Reserved.