Freescale Semiconductor ColdFire MCF52210 - Manual (Page 169)

Memory Map/Register Definition
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 11-9
11.2.1.7 RTC Interrupt Enable Register (RTCIENR)
The real-time clock interrupt enable register (RTCIENR) is used to enable/disable the various real-time
clock interrupts. Masking an interrupt bit has no effect on its corresponding status bit.
Figure 11-8. RTC Interrupt Enable Register (RTCIENR)
IPSBAR
Offset:
0x03D8 (RTCIENR) Access: User read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R 0 0 0 0 0 0 0 0 0 0
HR 1HZ DAY ALM MIN SW
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 11-8. RTCIENR Field Descriptions
Field Description
31-6 Reserved, should be cleared.
5
HR
Hour interrupt enable bit. This bit enables/disables an interrupt when the hour counter of the real-time clock
increments.
0 The 1-hour interrupt id disabled.
1 The 1-hour interrupt is enabled.
4
1HZ
1 Hz interrupt enable bit. This bit enables/disables an interrupt when the second counter of the real-time clock
increments.
0 The 1 Hz interrupt is disabled.
1 The 1 Hz interrupt is enabled.
3
DAY
Day interrupt enable bit. This bit enables/disables an interrupt when the hours counter rolls over from 23 to 0
(midnight rollover).
0 The 24-hour interrupt is disabled.
1 The 24-hour interrupt is enabled.
2
ALM
Alarm interrupt enable bit. This bit enables/disables the alarm interrupt.
0 The alarm interrupt is disabled.
1 The alarm interrupt is enabled.
1
MIN
Minute interrupt enable bit. This bit enables/disables an interrupt when the RTC minute counter increments.
0 The 1-minute interrupt is disabled.
1 The 1-minute interrupt is enabled.
0
SW
Stopwatch interrupt enable; enables/disables the stopwatch interrupt. The stopwatch counts down and
remains at decimal -1 until it is reprogrammed. If this bit is enabled with -1 (decimal) in the STPWCH register,
an interrupt is posted on the next minute tick.
Bit description
1 = Stopwatch interrupt is enabled.
0 = Stopwatch interrupt is disabled.