Freescale Semiconductor ColdFire MCF52210 - Manual (Page 543)

Debug Module
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 28-47
28.7.2 Supervisor Instruction Set
The supervisor instruction set has complete access to the user mode instructions plus the opcodes shown
below. The PST/DDATA specification for these opcodes is shown in
Table 28-27 .
The move-to-SR and RTE instructions include an optional PST = 0x3 value, indicating an entry into user
mode. Additionally, if the execution of a RTE instruction returns the processor to emulator mode, a
multiple-cycle status of 0xD is signaled.
Similar to the exception processing mode, the stopped state (PST = 0xE) and the halted state (PST = 0xFF)
display this status throughout the entire time the ColdFire processor is in the given mode.
28.8 Freescale-Recommended BDM Pinout
The ColdFire BDM connector is a 26-pin Berg connector arranged 2 x 13 as shown below.
msac.w Ry,Rx PST = 0x1
msac.w Ry,Rx,<ea>y,Rw PST = 0x1, {PST = 0xB, DD = source},
{PST = 0xB, DD = destination}
Table 28-27. PST/DDATA Specification for Supervisor-Mode Instructions
Instruction Operand Syntax PST/DDATA
cpushl (Ax) PST = 0x1
halt PST = 0x1,
PST = 0xF
move.l Ay,USP PST = 0x1
move.l USP,Ax PST = 0x1
move.w SR,Dx PST = 0x1
move.w {Dy,#<data>},SR PST = 0x1, {PST = 0x3}
movec.l Ry,Rc PST = 0x1
rte PST = 0x7, {PST = 0xB, DD = source operand}, {PST = 0x3}, { PST = 0xB,
DD =source operand},
PST = 0x5, {[PST = 0x9AB], DD = target address}
stldsr.w #imm PST = 0x1, {PST = 0xA, DD = destination operand, PST = 0x3}
stop #<data> PST = 0x1,
PST = 0xE
wdebug.l <ea>y PST = 0x1, {PST = 0xB, DD = source, PST = 0xB, DD = source}
Table 28-26. PST/DDATA Values for User-Mode Multiply-Accumulate Instructions (continued)
Instruction Operand Syntax PST/DDATA