6 rtc interrupt status register (rtcisr) – Freescale Semiconductor ColdFire MCF52210 User Manual

Page 168

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Real-Time Clock

MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2

11-8

Freescale Semiconductor

11.2.1.6

RTC Interrupt Status Register (RTCISR)

The real-time clock interrupt status register (RTCISR) indicates the status of the various real-time clock
interrupts. When an event of the types included in this register occurs, then the bit is set in this register
regardless of its corresponding interrupt enable bit. These bits are cleared by writing a 1 to them; this also
clears the interrupt. Interrupts may occur while the system clock is idle or in sleep mode.

Figure 11-7. RTC Interrupt Status Register (RTCISR)

IPSBAR

Offset: 0x03D4 (RTCISR)

Access: User read/write

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

R

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

W

Reset

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

R

0

0

0

0

0

0

0

0

0

0

HR

1HZ

DAY

ALM

MIN

SW

W

Reset

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Table 11-7. RTCISR Field Descriptions

Field

Description

31–6

Reserved, should be cleared.

5

HR

Hour flag bit. This bit indicates whether the hour counter has incremented. If enabled, this bit is set on every
increment of the RTC hour counter.
0 No 1-hour interrupt occurred
1 A 1-hour interrupt has occurred

4

1HZ

1 Hz flag bit. This bit indicates whether the second counter has incremented. If enabled, this bit is set on every
increment of the RTC second counter.
0 No 1 Hz interrupt occurred
1 A 1 Hz interrupt has occurred

3

DAY

Day flag bit. This bit indicates whether the day counter has incremented. If enabled, this bit is set on every
increment of the RTC day counter.
0 No 24-hour rollover interrupt occurred
1 A 24-hour rollover interrupt has occurred

2

ALM

Alarm flag bit. This bit indicates that the RTC time matches the value in the alarm registers. The alarm
reoccurs every 65536 days. For a single alarm, clear the interrupt enable for this bit in the interrupt service
routine.
0 No alarm interrupt occurred
1 An alarm interrupt has occurred

1

MIN

Minute flag bit. This bit indicates that the minute counter has incremented. If enabled, this bit is set on every
increment of the RTC minute counter.
0 No 1-minute interrupt occurred
1 A 1-minute interrupt has occurred

0

SW

Stopwatch flag bit. This bit indicates that the stopwatch countdown has timed out.
0 The stopwatch did not time out.
1 The stopwatch timed out.

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