15 address register (addr) – Freescale Semiconductor ColdFire MCF52210 User Manual

Page 251

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Universal Serial Bus, OTG Capable Controller

MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2

Freescale Semiconductor

15-23

15.4.1.15 Address Register (ADDR)

The Address Register holds the unique USB address that the USB Module decodes when in Peripheral
mode (HOST_MODE_EN=0). When operating in Host mode (HOST_MODE_EN=1) the USB Module
transmits this address with a TOKEN packet. This enables the USB Module to uniquely address an USB
peripheral. In either mode, the USB_EN bit within the control register must be set. The Address Register
is reset to 0x00 after the reset input becomes active or the USB Module decodes a USB reset signal. This
action initializes the Address Register to decode address 0x00 as required by the USB specification.

Figure 15-21

shows the ADDR register.

IPSBAR

Offset: 0x1C_0098 (ADDR)

Access: User read/write

7

6

5

4

3

2

1

0

R

LS_EN

ADDR

W

Reset:

0

0

0

0

0

0

0

0

Figure 15-21. ADDR Register

Table 15-25. ADDR Field Descriptions

Field

Description

7

LS_EN

Low Speed Enable bit. This bit informs the USB Module that the next token command written to the token
register must be performed at low speed. This enables the USB Module to perform the necessary preamble
required for low-speed data transmissions.

6–0

ADDR

USB address. This 7-bit value defines the USB address that the USB Module decodes in peripheral mode, or
transmit when in host mode.

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