1 i2c address registers (i2adrn), 2 i2c frequency divider registers (i2fdrn), C address registers (i2adr n ) – Freescale Semiconductor ColdFire MCF52210 User Manual

Page 424: C frequency divider registers (i2fdr n ), The i2adr n hold the address the i, C clock for bit-rate selection

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I

2

C Interface

MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2

25-4

Freescale Semiconductor

25.2.1

I

2

C Address Registers (I2ADRn)

The I2ADRn hold the address the I

2

C responds to when addressed as a slave. It is not the address sent on

the bus during the address transfer when the module is performing a master transfer.

25.2.2

I

2

C Frequency Divider Registers (I2FDRn)

The I2FDRn, shown in

Figure 25-3

, provide a programmable prescaler to configure the I

2

C clock for

bit-rate selection.

Table 25-1. I

2

C Module Memory Map

IPSBAR Offset

Register

Access

Reset Value

Section/Page

I

2

C0

I

2

C1

0x0300
0x0380

I

2

C Address Registers (I2ADRn)

R/W

0x00

25.2.1/25-4

0x0304
0x0384

I

2

C Frequency Divider Registers (I2FDRn)

R/W

0x00

25.2.2/25-4

0x0308
0x0388

I

2

C Control Registers (I2CRn)

R/W

0x00

25.2.3/25-5

0x030C
0x038C

I

2

C Status Registers (I2SRn)

R/W

0x81

25.2.4/25-7

0x0310
0x0390

I

2

C Data I/O Registers (I2DRn)

R/W

0x00

25.2.5/25-8

IPSBAR

Offset:

0x0300 (I2ADR0)
0x0380 (I2ADR1)

Access: User read/write

7

6

5

4

3

2

1

0

R

ADR

0

W

Reset:

0

0

0

0

0

0

0

0

Figure 25-2. I2ADRn Registers

Table 25-2. I2ADRn Field Descriptions

Field

Description

7–1

ADR

Slave address. Contains the specific slave address to be used by the I

2

C module. Slave mode is the default I

2

C mode

for an address match on the bus.

0

Reserved, must be cleared.

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