2 gpt compare force register (gpcforc), 3 gpt output compare 3 mask register (gptoc3m) – Freescale Semiconductor ColdFire MCF52210 User Manual
Page 344
General Purpose Timer Module (GPT)
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
21-6
Freescale Semiconductor
21.6.2
GPT Compare Force Register (GPCFORC)
NOTE
A successful channel 3 output compare overrides any compare on channels
2:0. For each OC3M bit that is set, the output compare action reflects the
corresponding OC3D bit.
21.6.3
GPT Output Compare 3 Mask Register (GPTOC3M)
IPSBAR
Offset: 0x1A_0001 (GPCFORC)
Access: Supervisor read/write
7
6
5
4
3
2
1
0
R
0
0
0
0
FOC
W
Reset:
0
0
0
0
0
0
0
0
Figure 21-3. GPT Input Compare Force Register (GPCFORC)
Table 21-5. GPTCFORC Field Descriptions
Field
Description
7–4
Reserved, should be cleared.
3–0
FOC
Force output compare.Setting an FOC bit causes an immediate output compare on the corresponding channel.
Forcing an output compare does not set the output compare flag. These bits are read anytime, write anytime.
1 Force output compare
0 No effect
IPSBAR
Offset: 0x1A_0002 (GPTOC3M)
Access: Supervisor read/write
7
6
5
4
3
2
1
0
R
0
0
0
0
OC3M
W
Reset:
0
0
0
0
0
0
0
0
Figure 21-4. GPT Output Compare 3 Mask Register (GPTOC3M)