Freescale Semiconductor ColdFire MCF52210 - Manual (Page 472)

Analog-to-Digital Converter (ADC)
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
26-36 Freescale Semiconductor
standby power mode requires an 8 MHz oscillator clock from the relaxation oscillator, crystal oscillator,
or external oscillator.
26.5.9.3 ADC Clock Resynchronization at Start of Scan
At the fastest ADC speed, each ADC clock period is 6 system clock periods long. When asserting the start
of a scan, by writing to a STARTn bit or by a SYNCn signal, the ADC clock is re-synchronized to align it
to the system clock. This allows the commanded scan to begin as soon as possible rather than wait up to 5
additional system clocks for the start of the next ADC clock period. This is shown in
Figure 26-26 for
sequential and simultaneous parallel modes of operation. In these modes, both ADCs operate off of the
same start signal.
In a parallel scan mode when SIMULT equals 0, both ADCs operate using independent STARTn bits and
SYNCn signals. As shown in
Figure 26-27 , the first scan started is re-synchronized to the system clock,
but the second scan may wait up to 5 additional system clocks before starting. Also, which converter is
synchronized to the system clock depends on which convert first starts to use the ADC. The case shown
has ADCA synchronized, but one could easily imagine the case where the ADCA start comes after instead
of before the ADCB start. In this case, ADCAs start would be delayed up to 5 additional system clock
periods instead of ADCBs.
If there is a known timing relationship between ADCA and ADCB when operating in a non-simultaneous
parallel mode, then the application can control which ADC starts first and gets the re-synchronized clock.
The application can also control the delay to starting the second ADC scan so that its start signal aligns
with the ADC clock, and the start of the second ADC is not delayed.
Figure 26-26. ADC Clock Resynchronization for
Sequential and Simultaneous Parallel Modes
START0
Asserted
ADC Conversion Clock Resynchronized
ADC Scans Start
System Clock
Old ADC Clock
ADC Clock After
Resynchronization
ADCA Scan
ADCB Scan