Freescale Semiconductor ColdFire MCF52210 - Manual (Page 325)

EzPort
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 19-3
EZPCK.The maximum frequency of the EzPort clock is half the system clock frequency for all commands
except when executing the read data command. When executing the Read Data command, the EzPort
clock has a maximum frequency of one eighth the system clock frequency.
19.3.2.2 EZPCS — EzPort Chip Select
EzPort chip select (EZPCS) is the chip select for signalling the start and end of serial transfers. If EZPCS
is asserted during and when the micro-controller’s reset out signal is negated, then EzPort is enabled out
of reset; otherwise it is disabled. After EzPort is enabled, asserting EZPCS commences a serial data
transfer, which continues until EZPCS is negated again. The negation of EZPCS indicates the current
command is finished and resets the EzPort state machine so that it is ready to receive the next command.
19.3.2.3 EZPD — EzPort Serial Data In
EzPort serial data in (EZPD) is the serial data in for data transfers. It is registered on the rising edge of
EZPCK. All commands, addresses, and data are shifted in most significant bit first. When EzPort is driving
output data on EZPQ, the data shifted in EZPD is ignored.
19.3.2.4 EZPQ — EzPort Serial Data Out
EzPort serial data out (EZPQ) is the serial data out for data transfers. It is driven on the falling edge of
EZPCK. It is tri-stated, unless EZPCS is asserted and the EzPort is driving data out. All data is shifted out
most significant bit first.
19.4 Command Definition
The EzPort receives commands from an external device and translates those commands into flash memory
accesses.
Table 19-2 lists the supported commands.
Table 19-2. EzPort Commands
Command Description Code
Address
Bytes
Dummy
Bytes
Data
Bytes
Compatible
Commands
1
1
Lists the compatible commands on the ST Microelectronics Serial Flash Memory parts.
WREN Write Enable 0x06 0 0 0 WREN
WRDI Write Disable 0x04 0 0 0 WRDI
RDSR Read Status Register 0x05 0 0 1 RDSR
WRCR Write Config Register 0x01 0 0 1 WRSR
READ Read Data 0x03 3 0 1+ READ
FAST_READ Read Data at High Speed 0x0B 3 1 1+ FAST_READ
PP Page Program 0x02 3 0 4 to 256 PP
SE Sector Erase 0xD8 3 0 0 SE
BE Bulk Erase 0xC7 0 0 0 BE
RESET Reset Chip 0xB9 0 0 0 DP