1 reset control register (rcr), 1 reset control register (rcr) -3, Section 10.5.1, “reset control – Freescale Semiconductor ColdFire MCF52210 User Manual
Page 153: Register (rcr)
Reset Controller Module
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
10-3
See
for the memory map and the following paragraphs for a description of the registers.
10.5.1
Reset Control Register (RCR)
The RCR allows software control for requesting a reset, independently asserting the external RSTO pin,
and controlling low-voltage detect (LVD) functions.
Table 10-2. Reset Controller Memory Map
IPSBAR
Offset
1
1
Addresses not assigned to a register and undefined register bits are reserved for expansion.
Register
Width
(bits)
Access
Reset Value
Section/Page
0x11_0000
Reset Control Register (RCR)
8
R/W
0x05
0x11_0001
Reset Status Register (RSR)
8
R
IPSBAR
Offset:
0x11_0000 (RCR)
Access: User read/write
7
6
5
4
3
2
1
0
R
SOFTRST
FRCRSTOU
T
0
LVDF
LVDIE
LVDRE
0
LVDE
W
Reset:
0
0
0
0
0
1
0
1
Figure 10-2. Reset Control Register (RCR)
Table 10-3. RCR Field Descriptions
Field
Description
7
SOFTRST
Allows software to request a reset. The reset caused by setting this bit clears this bit.
1 Software reset request
0 No software reset request
6
FRCRSTOUT
Allows software to assert or negate the external RSTO pin.
1 Assert RSTO pin
0 Negate RSTO pin
CAUTION: External logic driving reset configuration data during reset needs to be considered when asserting
the RSTO pin when setting FRCRSTOUT.
5
—
Reserved, should be cleared.
4
LVDF
LVD flag. Indicates the low-voltage detect status if LVDE is set. Write a 1 to clear the LVDF bit.
1 Low voltage has been detected
0 Low voltage has not been detected
NOTE: The setting of this flag causes an LVD interrupt if LVDE and LVDIE bits are set and LVDRE is cleared
when the supply voltage V
DD
drops below V
DD
(minimum). The vector for this interrupt is shared with INT0 of
the EPORT module. Interrupt arbitration in the interrupt service routine is necessary if both of these interrupts
are enabled. Also, LVDF is not cleared at reset; however, it always initializes to a zero because the part does
not come out of reset while in a low-power state (LVDE/LVDRE bits are enabled out of reset).