Freescale Semiconductor ColdFire MCF52210 - Manual (Page 215)

Interrupt Controller Module
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 14-5
14.3 Register Descriptions
The interrupt controller registers are described in the following sections.
IPSBAR + 0x0C54 ICRn20 ICRn21 ICRn22 ICRn23
IPSBAR + 0x0C58 ICRn24 ICRn25 ICRn26 ICRn27
IPSBAR + 0x0C5C ICRn28 ICRn29 ICRn30 ICRn31
IPSBAR + 0x0C60 ICRn32 ICRn33 ICRn34 ICRn35
IPSBAR + 0x0C64 ICRn36 ICRn37 ICRn38 ICRn39
IPSBAR + 0x0C68 ICRn40 ICRn41 ICRn42 ICRn43
IPSBAR + 0x0C6C ICRn44 ICRn45 ICRn46 ICRn47
IPSBAR + 0x0C70 ICRn48 ICRn49 ICRn50 ICRn51
IPSBAR + 0x0C74 ICRn52 ICRn53 ICRn54 ICRn55
IPSBAR + 0x0C78 ICRn56 ICRn57 ICRn58 ICRn59
IPSBAR + 0x0C7C ICRn60 ICRn61 ICRn62 ICRn63
IPSBAR + 0x0C80–
IPSBAR + 0x0CDC
Reserved
IPSBAR + 0x0CE0 SWIACKn Reserved
IPSBAR + 0x0CE4 L1IACKn Reserved
IPSBAR + 0x0CE8 L2IACKn Reserved
IPSBAR + 0x0CEC L3IACKn Reserved
IPSBAR + 0x0CF0 L4IACKn Reserved
IPSBAR + 0x0CF4 L5IACKn Reserved
IPSBAR + 0x0CF8 L6IACKn Reserved
IPSBAR + 0x0CFC L7IACKn Reserved
IPSBAR + 0x0D00–
IPSBAR + 0x0FE0
Reserved
IPSBAR + 0x0FE4 GL1IACK Reserved
IPSBAR + 0x0FE8 GL2IACK Reserved
IPSBAR + 0x0FEC GL3IACK Reserved
IPSBAR + 0x0FF0 GL4IACK Reserved
IPSBAR + 0x0FF4 GL5IACK Reserved
IPSBAR + 0x0FF8 GL6IACK Reserved
IPSBAR + 0x0FFC GL7IACK Reserved
Table 14-2. Interrupt Controller Memory Map (continued)
Module Offset Bits[31:24] Bits[23:16] Bits[15:8] Bits[7:0]