Freescale Semiconductor ColdFire MCF52210 - Manual (Page 360)

General Purpose Timer Module (GPT)
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
21-22 Freescale Semiconductor
21.9.3 Pulse Accumulator Input (PAIF)
PAIF is set when the selected edge is detected at the PAI pin. In event counter mode, the event edge sets
PAIF. In gated time accumulation mode, the trailing edge of the gate signal at the PAI pin sets PAIF. If the
PAI bit in GPTPACTL is also set, PAIF generates an interrupt request. Clear PAIF by writing a 1 to this
flag.
NOTE
When the fast flag clear all enable bit (GPTSCR1[TFFCA]) is set, any
access to the pulse accumulator counter registers clears all the flags in
GPTPAFLG.
21.9.4 Timer Overflow (TOF)
TOF is set when the GPT counter rolls over from 0xFFFF to 0x0000. If the GPTSCR2[TOI] bit is also set,
TOF generates an interrupt request. Clear TOF by writing a 1 to this flag.
NOTE
When the GPT channel 3 registers contain 0xFFFF and TCRE is set, TOF
does not get set even though the GPT counter registers go from 0xFFFF to
0x0000.
When the fast flag clear all bit (GPTSCR1[TFFCA]) is set, any access to the
GPT counter registers clears GPT flag register 2.
When TOF is set, it does not inhibit future overflow events.