Comtech EF Data SDM-300A - Manual (Page 16)

SDM-300A Satellite Modem Revision 6
Preface MN/SDM300A.IOM
xii
Figures
Figure 1-1. Block Diagram ....................................................................................................................................1–2
Figure 2-1. M&C Block Diagram ...........................................................................................................................2–2
Figure 2-2. Modulator Block Diagram ...................................................................................................................2–5
Figure 2-3. Demodulator Block Diagram...............................................................................................................2–8
Figure 2-4. Interface Block Diagram ...................................................................................................................2–12
Figure 3-1. Installation of the Mounting Bracket, KT/6228-1.................................................................................3–3
Figure 3-2. Overhead Interface PCB Installation ..................................................................................................3–5
Figure 3-3. Reed-Solomon Codec Installation......................................................................................................3–7
Figure 3-4. Turbo Codec Installation ..................................................................................................................3–10
Figure 3-5. Firmware Location............................................................................................................................3–11
Figure 3-6. PCB Location ...................................................................................................................................3–15
Figure 3-7. Installation of the Duplex Reed-Solomon Module ............................................................................3–16
Figure 3-8. Data I/O connector (J8) Removal/Installation...................................................................................3–19
Figure 3-9. Main Board Field-Changeable Chips................................................................................................3–21
Figure 3-10. Overhead Board Field-Changeable Chips......................................................................................3–22
Figure 4-1. Basic Modem, 25-Pin D Connector ....................................................................................................4–3
Figure 4-2. (V.35) 34-Pin Winchester Connector..................................................................................................4–3
Figure 4-3. EIA-422/449, 37-Pin D Connector......................................................................................................4–3
Figure 4-4. Overhead Option, 50-Pin D Connector................................................................................................4–3
Figure 4-5. 8-Channel, 100-Pin MUX Connector ..................................................................................................4–3
Figure 5-1. Front Panel View ................................................................................................................................5–1
Figure 5-2. Keypad ...............................................................................................................................................5–3
Figure 5-3. Menu Tree..........................................................................................................................................5–6
Figure 5-4. RF Loopback....................................................................................................................................5–17
Figure 5-5. IF Loopback......................................................................................................................................5–18
Figure 5-6. Baseband Loopback.........................................................................................................................5–27
Figure 5-7. Interface Loopback...........................................................................................................................5–28
Figure 7-1. EIA-422, EIA-232, or V.35 Master/Master Clocking Diagram.............................................................7–3
Figure 7-2. EIA-422, EIA-232, or Master/Slave Clocking Diagram .......................................................................7–4
Figure 7-3. IDR/IBS G.703 Master/Master Clocking Diagram...............................................................................7–5
Figure 7-4. IDR/IBS G.703 Master/Slave Clocking Diagram ................................................................................7–6
Figure 7-5. D&I G.703 Master/Master Clocking Diagram .....................................................................................7–8
Figure 8-1. Clock Slip ...........................................................................................................................................8–2
Figure 8-2. Doppler Shift.......................................................................................................................................8–3
Figure 9-1. Viterbi Decoder with Open Network BER Data ................................................................................9–11
Figure 9-2. Viterbi Decoder with Closed Netwrok BER Data ..............................................................................9–12
Figure 9-3. Viterbi Decoder with Reed-Solomon ................................................................................................9–13
Figure 9-4. Sequential BER Data (56 kbps)........................................................................................................9–14
Figure 9-5. Sequential Decoder, Reed-Solomon 1544 kbps ..............................................................................9–15
Figure 9-6. Sequential Decoder BER with Reed-Solomon 1544 kbps................................................................9–16
Figure 9-7 8-PSK with/without Reed-Solomon .................................................................................................9–17
Figure 9-8. Viterbi Decoder and Offset QPSK ....................................................................................................9–18
Figure 9-9. Uncoded 1/1 BPSK, QPSK, and Offset QPSK .................................................................................9–19
Figure 9-10. Turbo product Codec......................................................................................................................9–20