Rainbow Electronics AT91CAP9S250A User Manual
Page 19
19
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
Note:
1. DDR Port 2 or Port 3 is selectable for each master through the Matrix Remap Control Register.
Table 7-3.
AT91CAP9S500A/AT91CAP9S250A Masters to Slaves Access
Master
0 1
2
3
4
5
6
7
8
9
10
11
Slave
ARM926 Instr
u
ction
ARM926 Dat
a
P
e
ri
pher
al DMA C
tr
l
LC
DCtr
l
U
S
B
High
S
p
eed
De
v
ice
C
tr
l
Image Sensor Interf
ace
DMA Ctr
l
Ether
net MA
C
OHC
I USB Host Ctr
l
MP Bloc
k
Mas
ter 0
MP Bloc
k
Mas
ter 1
MP Bloc
k
Mas
ter 2
0
Internal SRAM
32 Kbytes
X
X
X
X
X
X
X
X
X
X
X
X
1
MP Block
Slave 0
X
X
X
X
X
X
X
X
X
X
X
X
2
Internal ROM
X
X
X
X
X
X
X
X
X
X
X
X
LCD
Controller
User Interface
X
X
-
-
-
-
-
-
-
X
X
X
USB High
Speed Device
Interface
X
X
-
-
-
-
X
-
-
X
X
X
OHCI USB
Host Interface
X
X
-
-
-
-
-
-
-
X
X
X
3
MPBlock
Slave 1
X
X
X
X
X
X
X
X
X
X
X
X
4
External Bus
Interface
X
X
X
X
X
X
X
X
X
X
X
X
-
-
DDR Port 0
X
-
-
-
-
-
-
-
-
-
-
-
5
DDR Port 1
-
X
-
-
-
-
-
-
-
-
-
-
6
DDR Port 2
X
X
X
X
X
X
DDR Port 3
X
X
X
X
X
X
7
MPBlock
Slave 2
X
X
X
X
X
X
X
X
X
X
X
X
8
MPBlock
Slave 3
X
X
X
X
X
X
X
X
X
X
X
X
9
Internal
Peripherals
X
X
X
-
-
-
X
-
-
X
X
X