Rainbow Electronics AT91CAP9S250A - Manual (Page 338)

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6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
The following list gives an overview of how status register flags behave depending on the
counters’ values:
• ENDRX flag is set when the PERIPH_RCR register reaches zero.
• RXBUFF flag is set when both PERIPH_RCR and PERIPH_RNCR reach zero.
• ENDTX flag is set when the PERIPH_TCR register reaches zero.
• TXBUFE flag is set when both PERIPH_TCR and PERIPH_TNCR reach zero.
These status flags are described in the Peripheral Status Register.
27.3.4 Data Transfers
The serial peripheral triggers its associated PDC channels’ transfers using transmit enable
(TXEN) and receive enable (RXEN) flags in the transfer control register integrated in the
peripheral’s user interface.
When the peripheral receives an external data, it sends a Receive Ready signal to its PDC
receive channel which then requests access to the Matrix. When access is granted, the PDC
receive channel starts reading the peripheral Receive Holding Register (RHR). The read data
are stored in an internal buffer and then written to memory.
When the peripheral is about to send data, it sends a Transmit Ready to its PDC transmit
channel which then requests access to the Matrix. When access is granted, the PDC transmit
channel reads data from memory and puts them to Transmit Holding Register (THR) of its
associated peripheral. The same peripheral sends data according to its mechanism.
27.3.5 PDC Flags and Peripheral Status Register
Each peripheral connected to the PDC sends out receive ready and transmit ready flags and
the PDC sends back flags to the peripheral. All these flags are only visible in the Peripheral
Status Register.
Depending on the type of peripheral, half or full duplex, the flags belong to either one single
channel or two different channels.
27.3.5.1 Receive Transfer End
This flag is set when PERIPH_RCR register reaches zero and the last data has been trans-
ferred to memory.
It is reset by writing a non zero value in PERIPH_RCR or PERIPH_RNCR.
27.3.5.2 Transmit Transfer End
This flag is set when PERIPH_TCR register reaches zero and the last data has been written
into peripheral THR.
It is reset by writing a non zero value in PERIPH_TCR or PERIPH_TNCR.
27.3.5.3 Receive Buffer Full
This flag is set when PERIPH_RCR register reaches zero with PERIPH_RNCR also set to
zero and the last data has been transferred to memory.
It is reset by writing a non zero value in PERIPH_TCR or PERIPH_TNCR.