6 ddr-sdramc user interface – Rainbow Electronics AT91CAP9S250A User Manual
Page 232
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232
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
23.6
DDR-SDRAMC User Interface
The User Interface is connected to the APB bus.
The DDRSDRC is programmed using the registers listed in
.
Table 23-8.
DDRSDRC User Interface
Offset
Register
Name
Access Reset
State
0x00
DDRSDRC Mode Register
DDRSDRC_MR
Read/Write
0x00000000
0x04
DDRSDRC Refresh Timer Register
DDRSDRC_RTR
Read/Write
0x00000000
0x08
DDRSDRC Configuration Register
DDRSDRC_CR
Read/Write
0x024
0x0C
DDRSDRC Timing0 Register
DDRSDRC_T0PR
Read/Write
0x20227225
0x10
DDRSDRC Timing1 Register
DDRSDRC_T1PR
Read/Write
0x3c80808
0x18
DDRSDRC Low-power Register
DDRSDRC_LPR
Read/Write
0x0
0x1C
DDRSDRC Memory Device Register
DDRSDRC_MD
Read/Write
0x10
0x20
DDRSDRC DLL Information Register
DDRSDRC_DLL
Read
0x00000001
0x28-0xE8
Reserved
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