Rainbow Electronics AT91CAP9S250A - Manual (Page 859)

859
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
Figure 44-7. Data IN Transfer for Endpoint with One Bank
Figure 44-8. Data IN Transfer for Endpoint with Two Banks
USB Bus
Packets
FIFO
Content
TX_COMPLT Flag
(UDPHS_EPTSTAx)
TX_PK_RDY
Flag
(UDPHS_EPTSTAx)
Prevous Data IN TX Microcontroller Loads Data in FIFO Data is Sent on USB Bus
Interrupt Pending
Set by firmware Cleared by hardware Set by the firmware Cleared by hardware
Interrupt Pending
Cleared by firmware
DPR access by firmware DPR access by hardware
Cleared by firmware
Payload in FIFO
Set by hardware
Data IN 2 Token IN NAK ACK Data IN 1 Token IN Token IN ACK
Data IN 1 Load in progress Data IN 2
Read by USB Device
Read by UDPHS Device
FIFO
(DPR)
Bank 0
TX_COMPLT
Flag
(UDPHS_EPTSTAx)
Interrupt Cleared by Firmware
Virtual TX_PK_RDY
bank 1
(UDPHS_EPTSTAx)
ACK Token IN ACK
Set by Firmware,
Data Payload Written in FIFO Bank 1
Cleared by Hardware
Data Payload Fully Transmitted
Token IN
USB Bus
Packets
Set by Hardware Set by Hardware
Set by Firmware,
Data Payload Written
in FIFO Bank 0
Written by
FIFO
(DPR)
Bank1
Microcontroller
Written by
Microcontroller
Written by
Microcontroller
Microcontroller
Load Data IN Bank 0 Microcontroller Load Data IN Bank 1
UDPHS Device Send Bank 0 Microcontroller Load Data IN Bank 0
UDPHS Device Send Bank 1
Interrupt Pending
Data IN Data IN
Cleared by Hardware
switch to next bank
Virtual TX_PK_RDY
bank 0
(UDPHS_EPTSTAx)