Rainbow Electronics AT91CAP9S250A User Manual
Page 220
220
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
A write command can be followed by a read command. To avoid breaking the current write
burst, Twtr/twrd (bl/2 + 2 = 6 cycles) should be met. See
Figure 23-6. Write Command Followed By A Read Command without Burst Write Interrupt, DDR-SDRAM Devices t
In the case of a single write access, write operation should be interrupted by a read access but
DM must be input 1 cycle prior to the read command to avoid writing invalid data. See
.
Figure 23-7. SINGLE Write Access Followed By A Read Access, DDR-SDRAM Devices
Twrd = BL/2 +2 = 8/2 +2 = 6
Twr=1
SDCLK
col a
col a
A[12:0]
NOP
WRITE
NOP
READ
BST
NOP
COMMAND
0
BA[1:0]
DQS[1:0]
Dc
Dd
De
Df
Dg
Dh
Da
Db
Da Db
D[15:0]
3
0
3
DM[1:0]
Row a
col a
NOP
PRCHG
NOP
ACT
NOP
WRITE
NOP
READ
BST
NOP
0
Data masked
SDCLK
A[12:0]
COMMAND
BA[1:0]
DQS[1:0]
Da Db
Da
Db
D[15:0]
3
0
3
DM[1:0]