Rainbow Electronics AT91CAP9S250A - Manual (Page 629)

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6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
frame and then determines which SLOTREQ bits to set active (low). These bits are passed
from the AC97 Codec to the AC’97 Controller in slot 1/SLOTREQ in every audio input frame.
Each time the AC‘97 controller sees one or more of the newly defined slot request flags set
active (low) in a given audio input frame, it must pass along the next PCM sample for the cor-
responding slot(s) in the AC-link output frame that immediately follows.
The variable Sample Rate mode is enabled by performing the following steps:
• Setting the VRA bit in the AC’97 Controller Mode Register (AC97C_MR).
• Enable Variable Rate mode in the AC‘97 Codec by performing a transfer on the Codec
channel.
Slot 1 of the input frame is automatically interpreted as SLOTREQ signaling bits. The AC’97
Controller will automatically fill the active slots according to both SLOTREQ and AC97C_OCA
register in the next transmitted frame.
37.6.4 Power Management
37.6.4.1 Powering Down the AC-Link
The AC97 Codecs can be placed in low power mode. The application can bring AC97 Codec
to a power down state by performing sequential writes to AC97 Codec powerdown register .
Both the bit clock (clock delivered by AC97 Codec, AC97CK) and the input line (AC97RX) are
held at a logic low voltage level. This puts AC97 Codec in power down state while all its regis-
ters are still holding current values. Without the bit clock, the AC-link is completely in a power
down state.
The AC’97 Controller should not attempt to play or capture audio data until it has awakened
AC97 Codec.
To set the AC’97 Codec in low power mode, the PR4 bit in the AC’97 Codec powerdown reg-
ister (Codec address 0x26) must be set to 1. Then the primary Codec drives both AC97CK
and AC97RX to a low logic voltage level.
The following operations must be done to put AC97 Codec in low power mode:
• Disable Channel A clearing CEN in the AC97C_CAMR register.
• Disable Channel B clearing CEN field in the AC97C_CBMR register.
• Disable Channel C clearing CCEN field in the AC97C_CCMR register.
• Write 0x2680 value in the AC97C_COTHR register.
• Poll the TXEMPTY flag in AC97C_CxSR registers for the 3 channels.
At this point AC97 Codec is in low power mode.
37.6.4.2 Waking up the AC-link
There are two methods to bring the AC-link out of low power mode. Regardless of the method,
it is always the AC97 Controller that performs the wake-up.
Wake-up Tiggered by the AC’97 Controller
The AC’97 Controller can wake up the AC97 Codec by issuing either a cold or a warm reset.
The AC’97 Controller can also wake up the AC97 Codec by asserting AC97FS signal, how-
ever this action should not be performed for a minimum period of four audio frames following
the frame in which the powerdown was issued.
Wake-up Triggered by the AC97 Codec