Rainbow Electronics AT91CAP9S250A - Manual (Page 464)

464
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
33.6.3.2 Master Mode Flow Diagram
Figure 33-6. Master Mode Flow Diagram
SPI Enable
CSAAT ?
PS ?
1
0
0
1
1
NPCS = SPI_TDR(PCS) NPCS = SPI_MR(PCS)
Delay DLYBS
Serializer = SPI_TDR(TD)
TDRE = 1
Data Transfer
SPI_RDR(RD) = Serializer
RDRF = 1
TDRE ?
NPCS = 0xF
Delay DLYBCS
Fixed
peripheral
Variable
peripheral
Delay DLYBCT
0
1
CSAAT ?
0
TDRE ?
1
0
PS ?
0
1
SPI_TDR(PCS)
= NPCS ?
no
yes
SPI_MR(PCS)
= NPCS ?
no
NPCS = 0xF
Delay DLYBCS
NPCS = SPI_TDR(PCS)
NPCS = 0xF
Delay DLYBCS
NPCS = SPI_MR(PCS),
SPI_TDR(PCS)
Fixed
peripheral
Variable
peripheral
- NPCS defines the current Chip Select
- CSAAT, DLYBS, DLYBCT refer to the fields of the
Chip Select Register corresponding to the Current Chip Select
- When NPCS is 0xF, CSAAT is 0.