8 twi interrupt disable register – Rainbow Electronics AT91CAP9S250A User Manual

Page 521

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521

6264A–CAP–21-May-07

AT91CAP9S500A/AT91CAP9S250A

34.10.8

TWI Interrupt Disable Register

Name: TWI_IDR

Access: Write-only

Reset Value: 0x00000000

• TXCOMP: Transmission Completed Interrupt Disable

• RXRDY: Receive Holding Register Ready Interrupt Disable

• TXRDY: Transmit Holding Register Ready Interrupt Disable

• SVACC: Slave Access Interrupt Disable

• GACC: General Call Access Interrupt Disable

• OVRE: Overrun Error Interrupt Disable

• NACK: Not Acknowledge Interrupt Disable

• ABRLST: Arbitration Lost Interrupt Disable

• SCL_WS: Clock Wait State Interrupt Disable

• EOSACC: End Of Slave Access Interrupt Disable

• ENDRX: End of Receive Buffer Interrupt Disable

• ENDTX: End of Transmit Buffer Interrupt Disable

• RXBUFF: Receive Buffer Full Interrupt Disable

• TXBUFE: Transmit Buffer Empty Interrupt Disable

0 = No effect.

1 = Disables the corresponding interrupt.

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TXBUFE

RXBUFF

ENDTX

ENDRX

EOSACC

SCL_WS

ARBLST

NACK

7

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5

4

3

2

1

0

OVRE

GACC

SVACC

TXRDY

RXRDY

TXCOMP

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