11 ac’97 controller codec channel status register – Rainbow Electronics AT91CAP9S250A User Manual
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6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
37.7.11
AC’97 Controller Codec Channel Status Register
Register Name:
AC97C_COSR
Access Type:
Read-only
• TXRDY: Channel Transmit Ready
0: Data has been loaded in Channel Transmit Register and is waiting to be loaded in the Channel Transmit Shift Register.
1: Channel Transmit Register is empty.
• TXEMPTY: Channel Transmit Empty
0: Data remains in the Channel Transmit Register or is currently transmitted from the Channel Transmit Shift Register.
1: Data in the Channel Transmit Register have been loaded in the Channel Transmit Shift Register and sent to the codec.
• UNRUN: Transmit Underrun
Active only when Variable Rate Mode is enabled (VRA bit set in the AC97C_MR register). Automatically cleared by a pro-
cessor read operation.
0: No data has been requested from the channel since the last read of the Status Register, or data has been available each
time the CODEC requested new data from the channel since the last read of the Status Register.
1: Data has been emitted while no valid data to send has been previously loaded into the Channel Transmit Shift Register
since the last read of the Status Register.
• RXRDY: Channel Receive Ready
0: Channel Receive Holding Register is empty.
1: Data has been received and loaded in Channel Receive Holding Register.
• OVRUN: Receive Overrun
Automatically cleared by a processor read operation.
0: No data has been loaded in the Channel Receive Holding Register while previous data has not been read since the last
read of the Status Register.
1: Data has been loaded in the Channel Receive Holding Register while previous data has not yet been read since the last
read of the Status Register.
• ENDRX: End of Reception for Channel x
0: The register AC97C_CxRCR has not reached 0 since the last write in AC97C_CxRCR or AC97C_CxRNCR.
1: The register AC97C_CxRCR has reached 0 since the last write in AC97C_CxRCR or AC97C_CxRNCR.
• RXBUFF: Receive Buffer Full for Channel x
0: AC97C_CxRCR or AC97C_CxRNCR have a value other than 0.
1: Both AC97C_CxRCR and AC97C_CxRNCR have a value of 0.
• ENDTX: End of Transmission for Channel x
0: The register AC97C_CxTCR has not reached 0 since the last write in AC97C_CxTCR or AC97C_CxNCR.
1: The register AC97C_CxTCR has reached 0 since the last write in AC97C_CxTCR or AC97C_CxTNCR.
• TXBUFE: Transmit Buffer Empty for Channel x
0: AC97C_CxTCR or AC97C_CxTNCR have a value other than 0.
1: Both AC97C_CxTCR and AC97C_CxTNCR have a value of 0.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
OVRUN
RXRDY
–
UNRUN
TXEMPTY
TXRDY