Rainbow Electronics AT91CAP9S250A - Manual (Page 247)

247
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
24.3 Product Dependencies
24.3.1 Cellular Ram Initialization
The Cellular Ram devices are initialized by the following sequence:
5. Minimum pause of 150 µs is provided to precede any signal toggle.
6. The Cellular Ram memory type must be set in the BCRAMC Memory Device Register.
7. Temperature-compensated self refresh (TCSR) and partial array self refresh (PASR)
must be set in the BCRAMC Low Power register.
8. Asynchronous timings (TCKA, TCRE..) must be set in the BCRAMC Timing Register.
9. Cellular Ram features must be set in the HBCRAMC Configuration Register:
– number rows, latency, drive strength (DS), the data bus width and cram_enabled bit
must be high.
Perform a write to the Cellular Ram device and the Bus Configuration Register (BCR) and
Refresh Configuration Register (RCR) are programmed automatically.
After initialization, the Cellular Ram devices are fully functional.
Figure 24-2. Initialization Sequence
A[27:0]
BCADV
BCCS
BCCK
BCCRE
D[31:0]
BCOE
BCWE
BCOWAIT
Write Bus Configuration
Register Write Refresh Configuration
Register
t
CRES
t
CRES
t
CEW
t
CEW
t
CKA