18 dmac channel x [x = 0 ] configuration register – Rainbow Electronics AT91CAP9S250A User Manual

Page 330

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330

6264A–CAP–21-May-07

AT91CAP9S500A/AT91CAP9S250A

26.5.18

DMAC Channel x [x = 0..3] Configuration Register

Name: DMAC_CFGx [x = 0..3]

Access: Read/Write

Reset Value: 0x0100000000

• SRC_PER

Channel x Source Request is associated with peripheral identifier coded SRC_PER handshaking interface.

• DST_PER

Channel x Destination Request is associated with peripheral identifier coded DST_PER handshaking interface.

• SRC_REP

0: When automatic mode is activated, source address is contiguous between two buffers.

1: When automatic mode is activated, the source address and the control register are reloaded from previous transfer.

• SRC_H2SEL

0: Software handshaking interface is used to trigger a transfer request.

1: Hardware handshaking interface is used to trigger a transfer request.

• DST_REP

0: When automatic mode is activated, destination address is contiguous between two buffers.

1: When automatic mode is activated, the destination and the control register are reloaded from the previous transfer.

• DST_H2SEL

0: Software handshaking interface is used to trigger a transfer request.

1: Hardware handshaking interface is used to trigger a transfer request.

• SOD

0: STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.

1: STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.

• LOCK_IF

0: Interface Lock capability is disabled

1: Interface Lock capability is enabled

• LOCK_B

31

30

29

28

27

26

25

24

AHB_PROT

23

22

21

20

19

18

17

16

LOCK_IF_L

LOCK_B

LOCK_IF

SOD

15

14

13

12

11

10

9

8

DST_H2SEL

DST_REP

SRC_H2SEL

SRC_REP

7

6

5

4

3

2

1

0

DST_PER

SRC_PER

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