Rainbow Electronics AT91CAP9S250A User Manual
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6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
read AC’97 Controller Channel x Status Register (AC97C_CxSR), x being the channel whose
event triggers the interrupt.
The application can disable event interrupts by writing in AC’97 Controller Interrupt Disable
Register (AC97C_IDR). The AC‘97 Controller Interrupt Mask Register (AC97C_IMR) shows
which event can trigger an interrupt and which one cannot.
37.6.2.7
Endianness
Endianness can be managed automatically for each channel, except for the Codec channel,
by writing to Channel Endianness Mode (CEM) in AC97C_CxMR. This enables transferring
data on AC-link in Big Endian format without any additional operation.
To Transmit a Word Stored in Big Endian Format on AC-link
Word to be written in AC’97 Controller Channel x Transmit Holding Register (AC97C_CxTHR)
(as it is stored in memory or microprocessor register).
Word stored in Channel x Transmit Holding Register (AC97C_CxTHR) (data to transmit)
.
Data transmitted on appropriate slot: data[19:0] = {Byte2[3:0], Byte1[7:0], Byte0[7:0]}.
To Transmit A Halfword Stored in Big Indian Format on AC-link
Halfword to be written in AC’97 Controller Channel x Transmit Holding Register
(AC97C_CxTHR).
Halfword stored in AC’97 Controller Channel x Transmit Holding Register (AC97C_CxTHR)
(data to transmit).
Data emitted on related slot: data[19:0] = {0x0, Byte1[7:0], Byte0[7:0]}.
To Transmit a10-bit Sample Stored in Big Endian Format on AC-link
Halfword to be written in AC’97 Controller Channel x Transmit Holding Register
(AC97C_CxTHR).
Halfword stored in AC’97 Controller Channel x Transmit Holding Register (AC97C_CxTHR)
(data to transmit).
31
24
23
16
15
8
7
0
Byte0[7:0]
Byte1[7:0]
Byte2[7:0]
Byte3[7:0]
31
24
23
20
19
16
15
8
7
0
–
–
Byte2[3:0]
Byte1[7:0]
Byte0[7:0]
31
24
23
16
15
8
7
0
–
–
Byte0[7:0]
Byte1[7:0]
31
24
23
16
15
8
7
0
–
–
Byte1[7:0]
Byte0[7:0]
31
24
23
16
15
8
7
0
–
–
Byte0[7:0]
{0x00, Byte1[1:0]}
31
24
23
16
15
10
9
8
7
0
–
–
–
Byte1
[1:0]
Byte0[7:0]