3 host control register (hcr), 1 hcr host receive interrupt enable (hrie) bit 0, 2 hcr host transmit interrupt enable (htie) bit 1 – Freescale Semiconductor DSP56366 User Manual

Page 101: 3 hcr host command interrupt enable (hcie) bit 2, Host control register (hcr) -7, Hcr host receive interrupt enable (hrie) bit 0 -7, Hcr host transmit interrupt enable (htie) bit 1 -7, Hcr host command interrupt enable (hcie) bit 2 -7, Figure 6-2, Host control register (hcr) (x:$ffffc2) -7

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3 host control register (hcr), 1 hcr host receive interrupt enable (hrie) bit 0, 2 hcr host transmit interrupt enable (htie) bit 1 | 3 hcr host command interrupt enable (hcie) bit 2, Host control register (hcr) -7, Hcr host receive interrupt enable (hrie) bit 0 -7, Hcr host transmit interrupt enable (htie) bit 1 -7, Hcr host command interrupt enable (hcie) bit 2 -7, Figure 6-2, Host control register (hcr) (x:$ffffc2) -7 | Freescale Semiconductor DSP56366 User Manual | Page 101 / 366 3 host control register (hcr), 1 hcr host receive interrupt enable (hrie) bit 0, 2 hcr host transmit interrupt enable (htie) bit 1 | 3 hcr host command interrupt enable (hcie) bit 2, Host control register (hcr) -7, Hcr host receive interrupt enable (hrie) bit 0 -7, Hcr host transmit interrupt enable (htie) bit 1 -7, Hcr host command interrupt enable (hcie) bit 2 -7, Figure 6-2, Host control register (hcr) (x:$ffffc2) -7 | Freescale Semiconductor DSP56366 User Manual | Page 101 / 366
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