1 shi input/output shift register (iosr)-host side, Table 7-1, Shi interrupt vectors -5 – Freescale Semiconductor DSP56366 User Manual

Page 129: Table 7-2, Shi internal interrupt priorities -5, Below and, Section 7.4.1, "shi input/output shift register, Iosr)—host side, 1 shi input/output shift register (iosr)—host side

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1 shi input/output shift register (iosr)-host side, Table 7-1, Shi interrupt vectors -5 | Table 7-2, Shi internal interrupt priorities -5, Below and, Section 7.4.1, "shi input/output shift register, Iosr)—host side, 1 shi input/output shift register (iosr)—host side | Freescale Semiconductor DSP56366 User Manual | Page 129 / 366 1 shi input/output shift register (iosr)-host side, Table 7-1, Shi interrupt vectors -5 | Table 7-2, Shi internal interrupt priorities -5, Below and, Section 7.4.1, "shi input/output shift register, Iosr)—host side, 1 shi input/output shift register (iosr)—host side | Freescale Semiconductor DSP56366 User Manual | Page 129 / 366
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