2 underrun error interrupt enable (xuie)-bit 1, 3 block transferred interrupt enable (xbie)-bit 2, 4 dax clock input select (xcs[1:0])-bits 3-4 – Freescale Semiconductor DSP56366 User Manual
Page 223: 5 dax start block (xsb)-bit 5, 6 xctr reserved bits-bits 6-23, 7 dax status register (xstr), Underrun error interrupt enable (xuie)—bit 1 -7, Block transferred interrupt enable (xbie)—bit 2 -7, Dax clock input select (xcs[1:0])—bits 3–4 -7, Dax start block (xsb)—bit 5 -7
Advertising
![2 underrun error interrupt enable (xuie)-bit 1, 3 block transferred interrupt enable (xbie)-bit 2, 4 dax clock input select (xcs[1:0])-bits 3-4 | 5 dax start block (xsb)-bit 5, 6 xctr reserved bits-bits 6-23, 7 dax status register (xstr), Underrun error interrupt enable (xuie)—bit 1 -7, Block transferred interrupt enable (xbie)—bit 2 -7, Dax clock input select (xcs[1:0])—bits 3–4 -7, Dax start block (xsb)—bit 5 -7 | Freescale Semiconductor DSP56366 User Manual | Page 223 / 366](/screens/111669/223.png)
2 underrun error interrupt enable (xuie)-bit 1, 3 block transferred interrupt enable (xbie)-bit 2, 4 dax clock input select (xcs[1:0])-bits 3-4 | 5 dax start block (xsb)-bit 5, 6 xctr reserved bits-bits 6-23, 7 dax status register (xstr), Underrun error interrupt enable (xuie)—bit 1 -7, Block transferred interrupt enable (xbie)—bit 2 -7, Dax clock input select (xcs[1:0])—bits 3–4 -7, Dax start block (xsb)—bit 5 -7 | Freescale Semiconductor DSP56366 User Manual | Page 223 / 366
Advertising