Freescale Semiconductor MCF5480 - Manual (Page 129)

Instruction Set Summary
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 3-25
FSUB <ea>y,FPx
FPy,FPx
B,W,L,S,D
D
FPx - Source
→ FPx
FTST <ea>y B, W, L, S, D Source Operand Tested
→ FPCC
ILLEGAL none none SP – 4
→ SP; PC → (SP) → PC; SP – 2 → SP;
SR
→ (SP); SP – 2 → SP; Vector Offset → (SP);
(VBR + 0x10)
→ PC
JMP <ea>y none Source Address
→ PC
JSR <ea>y none SP – 4
→ SP; nextPC → (SP); Source → PC
LEA <ea>y,Ax L <ea>y
→ Ax
LINK Ay,#<displacement> W SP – 4
→ SP; Ay → (SP); SP → Ay, SP + d
n
→ SP
LSL Dy,Dx
#<data>,Dx
L
L CCR[X,C]
← (Dx << Dy) ← 0
CCR[X,C]
← (Dx << #<data>) ← 0
LSR Dy,Dx
#<data>,Dx
L
L 0
→ (Dx >> Dy) → CCR[X,C]
0
→ (Dx >> #<data>) → CCR[X,C]
MAC Ry,RxSF,ACCx
Ry,RxSF,<ea>y,Rw,ACCx
W, L
W, L ACCx + (Ry * Rx){<<|>>}SF
→ ACCx
ACCx + (Ry * Rx){<<|>>}SF
→ ACCx;
(<ea>y(&MASK))
→ Rw
MOV3Q #<data>,<ea>x L Immediate Data
→ Destination
MOVCLR ACCy,Rx L Accumulator
→ Destination, 0 → Accumulator
MOVE
MOVE from
CCR
MOVE to CCR
<ea>y,<ea>x
MACcr,Dx
<ea>y,MACcr
CCR,Dx
<ea>y,CCR
B,W,L
L
L
W
W
Source
→ Destination
where MACcr can be any MAC control register:
ACCx, ACCext01, ACCext23, MACSR, MASK
MOVEA <ea>y,Ax W,L
→ L
Source
→ Destination
MOVEM #list,<ea>x
<ea>y,#list
L Listed Registers
→ Destination
Source
→ Listed Registers
MOVEQ #<data>,Dx B
→ L
Immediate Data
→ Destination
MSAC Ry,RxSF,ACCx
Ry,RxSF,<ea>y,Rw,ACCx
W, L
W, L ACCx - (Ry * Rx){<<|>>}SF
→ ACCx
ACCx - (Ry * Rx){<<|>>}SF
→ ACCx;
(<ea>y(&MASK))
→ Rw
MULS/MULU <ea>y,Dx W * W
→ L
L * L
→ L
Source * Destination
→ Destination
(Signed or Unsigned)
MVS <ea>y,Dx B,W Source with sign extension
→ Destination
MVZ <ea>y,Dx B,W Source with zero fill
→ Destination
NEG Dx L 0 – Destination
→ Destination
NEGX Dx L 0 – Destination – CCR[X]
→ Destination
NOP none none PC + 2
→ PC (Integer Pipeline Synchronized)
Table 3-8. User-Mode Instruction Set Summary (Continued)
Instruction Operand Syntax Operand Size Operation