Freescale Semiconductor MCF5480 - Manual (Page 758)

MCF548x Reference Manual, Rev. 3
25-6 Freescale Semiconductor
NOTE
The initiator mode is different from that of a fixed channel in that the period
is variable
.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R 0 0 0 S M PCT CRV
W
Reset 0 0 0 0 1 1 0 1 1 1 1 1 1 1 1 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R CRV
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Reg
Addr
MBAR + 0x7F10 (CTCR4); + 0x7F14 (CTCR5); + 0x7F18 (CTCR6); + 0x7F1C (CTCR7)
Figure 25-5. Comm Timer Configuration Register (CTCRn)—Variable Timer Channel
Table 25-4. CTCRn—Variable Timer Channel Field Descriptions
Bits Name Description
31–29 — Reserved, should be cleared.
28 S Clock enable source select. Selects the clock rate for the fixed timer channels. The clock rate for
the timer is the internal system clock divided by an 8-bit prescaler.
0 Sysclk
1 External clock
Note: The external bus clock cannot be any faster than half the frequency of the system clock.
27 M Mode. This bit is used to select between baud clock generator mode and task initiator mode. It is
set to one 1 at reset.
1 Task initiator mode. In this mode, the timer output is a bandwidth controlled initiator request
signal for the multichannel DMA. The initiator output is dependent upon the cAcknowledge signal
from the DMA. In the fixed timer channels, the percent active time is only counted while the
cAcknowledge is asserted. In contrast, the variable timer channels will count the percent active
time from beginning to end upon the first assertion of the cAcknowledge.
0 Baud Clock Generator. In this mode, the timer output is a free running clock. Following
initialization, both timer channels react in the same way.
26-24 PCT Percent active time select. Selects the percent of the period that the cInitiator signal is asserted
after the cAcknowledge signal is received. They are set to 101 at reset.
000 100 percent
001 50 percent
010 25 percent
011 12.5 percent
100 6.25 percent
101 OFF
110–111 Reserved
23–0 CRV Counter reference value. These 24 bits define the period of the timer i.e.: 0004 written into these
bits signifies that the period is 4 timer clock cycles long. The counter reference value is set to
0xFF_FFFF at reset.