Table 3-9 describes supervisor -mode instructions – Freescale Semiconductor MCF5480 User Manual

Page 130

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MCF548x Reference Manual, Rev. 3

3-26

Freescale Semiconductor

Table 3-9

describes supervisor-mode instructions.

NOT

Dx

L

~ Destination

→ Destination

OR

<ea>y,Dx
Dy,<ea>x

L
L

Source |

Destination

→ Destination

ORI

#<data>,Dx

L

Immediate Data

| Destination

→ Destination

PEA

<ea>y

L

SP – 4

→ SP; <ea>y → (SP)

PULSE

none

none

Set PST = 0x4

REMS/REMU

<ea>y,Dw:Dx

L

Destination / Source

→ Remainder

(Signed or Unsigned)

RTS

none

none

(SP)

→ PC; SP + 4 → SP

SATS

Dx

L

If CCR[V] == 1;

then if Dx[31] == 0;

then Dx[31:0] = 0x80000000;
else Dx[31:0] = 0x7FFFFFFF;

else Dx[31:0] is unchanged

Scc

Dx

B

If Condition True, Then 1s

→ Destination;

Else 0s

→ Destination

SUB

SUBA

<ea>y,Dx
Dy,<ea>x
<ea>y,Ax

L
L
L

Destination - Source

→ Destination

SUBI

SUBQ

#<data>,Dx

#<data>,<ea>x

L
L

Destination – Immediate Data

→ Destination

SUBX

Dy,Dx

L

Destination – Source – CCR[X]

→ Destination

SWAP

Dx

W

MSW of Dx

↔ LSW of Dx

TAS

<ea>x

B

Destination Tested

→ CCR;

1

→ bit 7 of Destination

TPF

none

#<data>
#<data>

none

W

L

PC + 2

→ PC

PC + 4

→ PC

PC + 6

→ PC

TRAP

#<vector>

none

1

→ S Bit of SR; SP – 4 → SP; nextPC → (SP);

SP – 2

→ SP; SR → (SP)

SP – 2

→ SP; Format/Offset → (SP)

(VBR + 0x80 +4*n)

→ PC, where n is the TRAP

number

TST

<ea>y

B, W, L

Source Operand Tested

→ CCR

UNLK

Ax

none

Ax

→ SP; (SP) → Ax; SP + 4 → SP

WDDATA

<ea>y

B, W, L

Source

→ DDATA port

Table 3-8. User-Mode Instruction Set Summary (Continued)

Instruction

Operand Syntax

Operand Size

Operation

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