Freescale Semiconductor MCF5480 - Manual (Page 41)

MCF548x Reference Manual, Rev. 3
Freescale Semiconductor xli
About This Book
The primary objective of this reference manual is to define the functionality of the MCF548x processors
for use by software and hardware developers.
The information in this book is subject to change without notice, as described in the disclaimers on the title
page of this book. As with any technical documentation, it is the readers’ responsibility to be sure they are
using the most recent version of the documentation.
To locate any published errata or updates for this document, refer to the world-wide web at
http://www.freescale.com/coldfire .
Audience
This manual is intended for system software and hardware developers and applications programmers who
want to develop products for the MCF548x. It is assumed that the reader understands operating systems,
microprocessor system design, basic principles of software and hardware, and basic details of the ColdFire
architecture.
Organization
Following is a summary and a brief description of the major sections of this manual:
• Chapter 1, “Overview,” includes general descriptions of the modules and features incorporated in
the MCF548x, focussing in particular on new features.
• Chapter 2, “Signal Descriptions,” provides an alphabetical listing of MCF548x signals, including
which are inputs or outputs, how they are multiplexed, and the state of each signal at reset.
• Part I, “Processor Core,” is intended for system designers who need to understand the operation of
the MCF548x ColdFire core and its enhanced multiply/accumulate (EMAC) execution unit. It
describes the programming and exception models, Harvard memory implementation, and debug
module. Part 1 contains the following chapters:
—
Chapter 3, “ColdFire Core,” provides an overview of the microprocessor core of the
MCF548x. The chapter begins with a description of enhancements from the V3 ColdFire core,
and then fully describes the V4e programming model as it is implemented on the MCF548x. It
also includes a full description of exception handling, data formats, an instruction set summary,
and a table of instruction timings.
— Chapter 4, “Enhanced Multiply-Accumulate Unit (EMAC),” describes the MCF548x
enhanced multiply/accumulate unit, which executes integer multiply, multiply-accumulate, and
miscellaneous register instructions. The EMAC is integrated into the operand execution
pipeline (OEP).
— Chapter 5, “Memory Management Unit (MMU),” describes describes the ColdFire virtual
memory management unit (MMU), which provides virtual-to-physical address translation and
memory access control.
— Chapter 6, “Floating-Point Unit (FPU),” describes instructions implemented in the
floating-point unit (FPU) designed for use with the ColdFire family of microprocessors.