Freescale Semiconductor MCF5480 - Manual (Page 24)

MCF548x Reference Manual, Rev. 3
xxiv Freescale Semiconductor
Contents
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Number
Title
Page
Number
20.6 Interrupts ..................................................................................................................... 20-10
Chapter 21
FlexCAN
21.1 Introduction ................................................................................................................... 21-1
21.1.1 Block Diagram .......................................................................................................... 21-1
21.1.2 The CAN System ...................................................................................................... 21-2
21.1.3 Features ..................................................................................................................... 21-3
21.1.4 Modes of Operation .................................................................................................. 21-3
21.1.4.1 Normal Mode ........................................................................................................ 21-3
21.1.4.2 Freeze Mode ......................................................................................................... 21-3
21.1.4.3 Module Disabled Mode ........................................................................................ 21-4
21.1.4.4 Loop-Back Mode .................................................................................................. 21-4
21.1.4.5 Listen-Only Mode ................................................................................................. 21-4
21.2 External Signals ............................................................................................................ 21-5
21.2.1 CANTX[1:0] ............................................................................................................. 21-5
21.2.2 CANRX[1:0] ............................................................................................................. 21-5
21.3 Memory Map/Register Definition ................................................................................ 21-5
21.3.1 FlexCAN Memory Map ............................................................................................ 21-5
21.3.2 Register Descriptions ................................................................................................ 21-6
21.3.2.1 FlexCAN Module Configuration Register (CANMCR) ....................................... 21-6
21.3.2.2 FlexCAN Control Register (CANCTRL) ............................................................. 21-8
21.3.2.3 FlexCAN Timer Register (TIMER) .................................................................... 21-10
21.3.2.4 Rx Mask Registers .............................................................................................. 21-11
21.3.2.5 FlexCAN Error Counter Register (ERRCNT) .................................................... 21-14
21.3.2.6 FlexCAN Error and Status Register (ERRSTAT) .............................................. 21-15
21.3.2.7 Interrupt Mask Register (IMASK) ...................................................................... 21-17
21.3.2.8 Interrupt Flag Register (IFLAG) ........................................................................ 21-18
21.4 Functional Overview ................................................................................................... 21-19
21.4.1 Message Buffer Structure ....................................................................................... 21-19
21.4.2 Message Buffer Memory Map ................................................................................ 21-22
21.4.3 Transmit Process ..................................................................................................... 21-23
21.4.4 Arbitration Process ................................................................................................. 21-24
21.4.5 Receive Process ...................................................................................................... 21-24
21.4.5.1 Self-Received Frames ......................................................................................... 21-25
21.4.6 Message Buffer Handling ....................................................................................... 21-25
21.4.6.1 Serial Message Buffers (SMBs) ......................................................................... 21-26
21.4.6.2 Transmit Message Buffer Deactivation .............................................................. 21-26
21.4.6.3 Receive Message Buffer Deactivation ................................................................ 21-26
21.4.6.4 Locking and Releasing Message Buffers ........................................................... 21-27