Freescale Semiconductor MCF5480 - Manual (Page 179)

MMU Definition
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 5-13
Table 5-6 describes MMUOR fields.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R AA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R 0 0 0 0 0 0 0 STLB CA CNL CAS ITLB ADR R/W ACC UAA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reg
Addr
MMUBAR + 0x004
Figure 5-5. MMU Operation Register (MMUOR)
Table 5-6. MMUOR Field Descriptions
Bits Name Description
31–16 AA TLB allocation address. This read-only field is maintained by MMU hardware. Its range and
format depend on the TLB implementation (specific TLB size in entries, associativity, and
organization). The access TLB function can use AA to read or write the addressed TLB
entry. The MMU loads AA on the following three events:
• On DTLB access errors, it loads the address of the TLB entry that caused the error.
• If UAA is set, it loads the address of the TLB entry chosen by the MMU for replacement.
• If STLB is set, it uses the data in MMUAR to search the TLB and if the TLB hits, loads
the address of the TLB entry that hits, or if the TLB misses, loads the TLB entry chosen
by the MMU for replacement.
The MMU never picks a locked entry for replacement, and TLB hits of locked entries do not
update hardware replacement algorithm information. This is so access error handlers
mapped with locked TLB entries do not influence the replacement algorithm. Further, TLB
search operations do not update the hardware replacement algorithm information while
TLB writes (loads) do update the hardware replacement algorithm information. The
algorithm used to choose the allocation address depends on the TLB implementation
(such as LRU, round-robin, pseudo-random).
15–9 — Reserved, should be cleared. Writes are ignored and reads return zeros.
8 STLB Search TLB. STLB always reads as zero.
0 No operation
1 The MMU searches the TLB using data in MMUAR. This operation updates the probe
TLB hit bit in the status register plus loads the AA field as described above.
7 CA Clear all TLB entries. CA always reads as zero.
0 No operation
1 Clear all TLB entries and all hardware TLB replacement algorithm information.
6 CNL Clear all non-locked TLB entries. Setting CNL clears all TLB entries that do not have their
locked bit set. CNL always reads as zero.
0 No operation
1 Clear all non-locked TLB entries.