Freescale Semiconductor MCF5480 - Manual (Page 417)

MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 17-1
Chapter 17
FlexBus
17.1 Introduction
This chapter describes data transfer operations, error conditions, and reset operations. It describes transfers
initiated by the MCF548x and includes detailed timing diagrams showing the interaction of signals in
supported bus operations.
NOTE
Unless otherwise noted, in this chapter the term ‘clock’ refers to the CLKIN
used for the bus.
17.1.1 Overview
A multi-function external bus interface called the FlexBus interface controller is provided on the
MCF548x with basic functionality of interfacing to slave-only devices up to a maximum bus frequency of
66 MHz. It can be directly connected to asynchronous or synchronous devices such as external boot
ROMs, flash memories, gate-array logic, or other simple target (slave) devices with little or no additional
circuitry. For asynchronous devices a simple chip-select based interface can be used.
The FlexBus interface has six general purpose chip-selects (FBCS[5:0]). Chip-select FBCS0 can be
dedicated to boot ROM access and can be programmed to be byte (8 bits), word (16 bits), or longword (32
bits) wide. Control signal timing is compatible with common ROM / flash memories.
17.1.2 Features
The following list summarizes the key FlexBus features:
• Six independent, user-programmable chip-select signals (FBCS[5:0]) that can interface with
SRAM, PROM, EPROM, EEPROM, Flash, and other peripherals
• 8-, 16-, and 32-bit port sizes with configuration for multiplexed or non-multiplexed address and
data buses
• Byte, word, and longword, and line sized transfers
• Programmable burst and burst-inhibited transfers selectable for each chip select and transfer
direction
• Programmable address setup time with respect to the assertion of chip select
• Programmable address hold time with respect to the negation of chip select and transfer direction
17.1.3 Modes of Operation
The FlexBus interface is a configurable multiplexed bus that is set to one of four modes:
• Multiplexed 32-bit address and 32-bit data
• Multiplexed 32-bit address and 16-bit data (non-multiplexed 16-bit address and 16-bit data)
• Multiplexed 32-bit address and 8-bit data (non-multiplexed 24-bit address and 8-bit data)
• Non-multiplexed 32-bit address with 32-bit data