Freescale Semiconductor MCF5480 - Manual (Page 879)

Memory Map/Register Definition
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 29-5
0xB088 USB PID error counter register,
USB framing error counter register PIDECNT FRMECNT
0xB08C USB transmitted packet counter register
USB counter overflow register
Reserved TXPCNT CNTOVR —
0xB090–
0xB0FF Reserved
Endpoint Context Registers
0xB100 EP0 attribute control register,
EP0 max packet size register — EP0ACR EP0MPSR
0xB104 EP0 interface number register,
EP0 status register,
bmRequest type register,
bRequest type register EP0IFR EP0SR BMRTR BRTR
0xB108 wValue register,
wIndex register WVALUER WINDEXR
0xB10C wLength register WLENGTHR —
0xB110–
0xB12F Reserved
0xB130 EP1 OUT attribute control register,
EP1 OUT max packet size register — EP1OUTAC
R
EP1OUTMPSR
0xB134 EP1 OUT interface number register,
EP1 OUT status register EP1OUTIFR EP1OUTSR — —
0xB138 Reserved
0xB13C EP1 OUT sync frame register EP1OUTSFR
0xB140–
0xB147 Reserved
0xB148 EP1 IN attribute control register,
EP1 IN max packet size register — EP1INACR EP1INMPSR
0xB14C EP1 IN interface number register,
EP1 IN status register EP1INIFR EP1INSR — —
0xB150–
0xB154 Reserved
0xB158 EP1 IN sync frame register EP1INSFR
0xB15C–
0xB15F Reserved
0xB160 EP2 OUT attribute control register,
EP2 OUT max packet size register — EP2OUTAC
R
EP2OUTMPSR
Table 29-1. USB Memory Map (Continued)
Address
(MBAR +)
Name Byte0 Byte1 Byte2 Byte3