Freescale Semiconductor MCF5480 - Manual (Page 873)

Initialization Sequence
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 28-19
Figure 28-14. Flow-Chart of Typical I
2
C Interrupt Routine
Clear IIF
Tx/Rx
?
Second
Last Byte to
be Read
?
Clear IAL
Last Byte
to be Read
?
Switch to
Rx Mode
Dummy Read
from I2DR
Set
TXAK=1
Generate
STOP Signal
Generate
STOP Signal
Read Data from
I2DR and Store
Set
Tx Mode
Write Data
to I2DR
Tx Next
Byte
Read Data from
I2DR and Store
Set
Rx Mode
Switch to
Rx Mode
Dummy Read
from I2DR
Dummy Read
from I2DR
RTE
Arbitration
Lost
?
IAAS=1
?
IAAS=1
?
SRW=1
?
Tx/Rx
?
ACK from
Receiver
?
Yes
No
Yes
Tx
Rx
No
Yes
No
(Write)
(Read)
Yes
No
Tx Rx
Yes
No
Yes
No
No
Yes
Data
Cycle
Address
Cycle
No Yes
No
Yes
Last Byte
Transmitted
?
RXAK=0
?
End of
Addr Cycle
(Master Rx)
?
Write Next
Byte to I2DR
No
Yes
Yes
No
Master
Mode
?