Freescale Semiconductor MCF5480 - Manual (Page 366)

MCF548x Reference Manual, Rev. 3
13-14 Freescale Semiconductor
determines the highest priority within the level, and then responds with the unique vector number
corresponding to that specific interrupt source. The vector number is supplied as the data for the byte-sized
IACK read cycle. In addition to providing the vector number, the interrupt controller also loads the level
and priority number for the level into the IACKLPR, where it may be retrieved later.
This interrupt controller design also supports the concept of a software IACK. A software IACK is a useful
concept that allows an interrupt service routine to determine if there are other pending interrupts, so that
the overhead associated with interrupt exception processing (including machine state save/restore
functions) can be minimized. In general, the software IACK is performed near the end of an interrupt
service routine, and if there are additional active interrupt sources, the current interrupt service routine
(ISR) passes control to the appropriate service routine, but without taking another interrupt exception.
When the interrupt controller receives a software IACK read, it returns the vector number associated with
the highest level, highest priority unmasked interrupt source for that interrupt controller. The IACKLPR
is also loaded as the software IACK is performed. If there are no active sources, the interrupt controller
returns an all-zero vector as the operand. For this situation, the IACKLPR is also cleared.
In addition to the software IACK registers within each interrupt controller, there are global software IACK
registers. A read from the global SWIACK will return the vector number for the highest level and priority
unmasked interrupt source from all interrupt controllers. A read from one of the LnIACK registers will
return the vector for the highest priority unmasked interrupt within a level for all interrupt controllers.
7 6 5 4 3 2 1 0
R VECTOR
W
Reset 0 0 0 0 0 0 0 0
Reg
Addr
See Table 13-2 for register offsets
Figure 13-10. Software and Level n IACK Registers (SWIACKR, L1IACK–L7IACK)
Table 13-13. SWIACK and L1IACK–L7IACK Field Descriptions
Bits Name Description
7–0 VECTOR Vector number. A read from the SWIACK register returns the vector number associated
with the highest level, highest priority unmasked interrupt source. A read from one of the
LnACK registers returns the highest priority unmasked interrupt source within the level.