Freescale Semiconductor MCF5480 - Manual (Page 258)

MCF548x Reference Manual, Rev. 3
8-8 Freescale Semiconductor
8.3.3 Processor Halted (PST = 0xF)
PST is 0xF when the processor is halted (see Section 8.5.1, “CPU Halt ”). Because this encoding defines a
multiple-cycle mode, the PSTDDATA outputs display 0xF until the processor is restarted or reset.
Therefore, PSTDDATA[7:0] continuously are 0xFF.
NOTE
HALT can be distinguished from a data output 0xFF by counting 0xFF
occurrences on PSTDDATA. Because data always follows a marker (0x8,
0x9, 0xA, or 0xB), the longest occurrence in PSTDDATA of 0xFF in a data
output is four.
Two scenarios exist for data 0xFFFF_FFFF:
• The B marker occurs on the most-significant nibble of PSTDDATA with the data of 0xFF
following:
PSTDDATA[7:0]
0xBF
0xFF
0xFF
0xFF
0xFX (X indicates that the next PST value is guaranteed to not be 0xF.)
• The B marker occurs on the least-significant nibble of PSTDDATA with the data of 0xFF
following:
PSTDDATA[7:0]
0xYB
0xFF
0xFF
0xFF
0xFF
0xXY (X indicates the PST value is guaranteed not to be 0xF, and Y signifies a PSTDDATA
value that doesn’t affect the 0xFF count.)
NOTE
As the result of the above, a count of at least nine or more sequential single
0xF values or five or more sequential 0xFF values indicates the HALT
condition.
Table 8-5. 0xE Status Posting
PSTDDATA Stream Includes Result
{0xE, 0x2} Breakpoint state changed to waiting for level-1 trigger
{0xE, 0x4} Breakpoint state changed to level-1 breakpoint triggered
{0xE, 0xA} Breakpoint state changed to waiting for level-2 trigger
{0xE, 0xC} Breakpoint state changed to level-2 breakpoint triggered
{0xE, 0xE} Stopped mode.