5 mdeu interrupt mask register (mdimr), Mdeu interrupt mask register (mdimr) -44, P. 22-44 – Freescale Semiconductor MCF5480 User Manual

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MCF548x Reference Manual, Rev. 3

22-44

Freescale Semiconductor

22.10.5 MDEU Interrupt Mask Register (MDIMR)

The MDEU interrupt mask register, shown in

Figure 22-32

, controls the result of detected errors. For a

given error, if the corresponding bit in this register is set, then the error is disabled; no error interrupt occurs

and the interrupt status register is not updated to reflect the error. If the corresponding bit is not set, then

upon detection of an error, the interrupt status register is updated to reflect the error, causing assertion of

the error interrupt signal, and causing the module to halt processing.

25-21

Reserved, should be cleared.

20

IE

Internal Error. Indicates the MDEU has been locked up and requires a reset before use.
0 No internal error detected
1 Internal error detected
Note: This bit will be asserted any time an enabled error condition occurs and can only be
cleared by setting the corresponding bit in the interrupt mask register or by resetting the
MDEU.

19

ERE

Early Read Error. The MDEU context was read before the MDEU completed the hashing
operation.
0 No error detected
1 Early read error

18

CE

Context Error. The MDEU key register, key size register, or data size register was modified
while MDEU was hashing.
0 No error detected
1 Context error

17

KSE

Key Size Error. A value greater than 512 bits was written to the MDEU key size register.
0 No error detected
1 Key size error

16

DSE

Data Size Error. A value not a multiple of 512 bits while the MDEU mode register autopad
bit is negated.
0 No error detected
1 Data size error

15-0

Reserved, should be cleared.

Table 22-28. MDISR Field Descriptions (Continued)

Bits

Name

Description

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