Freescale Semiconductor MCF5480 - Manual (Page 731)

Memory Map/Register Definitions
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 24-11
24.3.3.9 Task Control Registers (TCRn)
Each of the sixteen tasks has an associated task control register. Only one register is shown. At system
reset, all bits are initialized to logic zeros.
Table 24-8. DIMR Field Descriptions
Bits Name Description
31–16 — Reserved
15–0 TASKn Interrupt mask. Each bit corresponds to an interrupt source defined by the task number. An
interrupt is masked by setting the corresponding bit in the IMR. At system reset, all bits are
initialized to logic ones.
0 The corresponding interrupt source is not masked
1 The corresponding interrupt source is masked
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R EN V ALW
INIT
INITNUM ASTRT HIPRI
TSKEN
HLDINIT
NUM
0 ASTSKNUM
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reg
Addr
MBAR + 0x801C (TCR0), 0x801E (TCR1), 0x8020 (TCR2), 0x8022 (TCR3), 0x8024 (TCR4), 0x8026 (TCR5), 0x8028 (TCR6),
0x802A (TCR7), 0x802C (TCR8), 0x280E (TCR9), 0x3800 (TCR10), 0x8032 (TCR11), 0x8034 (TCR12), 0x8036 (TCR13),
0x8038 (TCR14), 0x803A (TCR15)
Figure 24-10. Task Control Register (TCRn)
Table 24-9. TCRn Field Descriptions
Bits Name Description
15 EN Task enable. Setting this bit will start the task.This bit can be set or cleared by the programmer
at any time when a task is enabled or disabled. This bit is also set by the PTD logic if the
auto-restart bit is set and the task completes.
0 Disabled
1 Enabled
14 V Initiator number is valid. This bit is set by the PTD logic when the MDE obtains the initiator value
from the first DRD that is parsed. This bit is cleared by the PTD logic when the task completes.
At system reset, this bit is cleared.
0 Initiator is not valid
1 Initiator is valid
13 ALWINIT Decode of the always initiator. This bit is a status only bit and is set and cleared by writing the
initiator number into the Task Control Register. When the always initiator number (0) is written
to the Task Control Register by the user or the MDE the ALWINIT bit is set. When a different
initiator number is written to the Task Control Register , then the ALWINIT bit is cleared.
0 The always initiator is not being used
1 The always initiator is being used
12–8 INITNUM Initiator number from task descriptor. These bits are registered when the MDE has parsed the
first DRD to obtain the initiator number. These bits are cleared by system reset. These bits can
be written by the programmer when the HLDINITNUM bit is set or being set and the task is not
enabled.