Freescale Semiconductor ColdFire MCF52210 - Manual (Page 38)

Signal Descriptions
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
2-8 Freescale Semiconductor
2.4 Reset Signals
Table 2-2 describes signals that are used to reset the chip or as a reset indication.
2.5 PLL and Clock Signals
Table 2-3 describes signals that are used to support the on-chip clock generation circuitry.
2.6 Mode Selection
Table 2-4 describes signals used in mode selection, Table 2-5 describes particular clocking modes.
Table 2-2. Reset Signals
Signal Name Abbreviation Function I/O
Reset In RSTI Primary reset input to the device. Asserting RSTI immediately resets
the CPU and peripherals. I
Reset Out RSTO Driven low for 512 CPU clocks after the reset source has deasserted
and PLL locked. O
Table 2-3. PLL and Clock Signals
Signal Name Abbreviation Function I/O
External Clock In EXTAL Crystal oscillator or external clock input except when the on-chip
relaxation oscillator is used. I
Crystal XTAL Crystal oscillator output except when CLKMOD1=1, then sampled as
part of the clockmode selection mechanism. O
Clock Out CLKOUT This output signal reflects the internal system clock. O
Table 2-4. Mode Selection Signals
Signal Name Abbreviation Function I/O
Clock Mode Selection CLKMOD[1:0] Selects the clock boot mode. I
Reset Configuration RCON The serial flash programming mode is entered by asserting the
RCON pin (with the TEST pin negated) as the chip comes out of
reset. During this mode, the EzPort has access to the flash memory
which can be programmed from an external device.
Test TEST Reserved for factory testing only and in normal modes of operation
should be connected to VSS to prevent unintentional activation of
test functions. I