Freescale Semiconductor ColdFire MCF52210 - Manual (Page 429)

I 2 C Interface
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 25-9
Figure 25-7. I
2
C Standard Communication Protocol
25.3.2 Slave Address Transmission
The master sends the slave address in the first byte after the START signal (B). After the seven-bit calling
address, it sends the R/W bit (C), which tells the slave data transfer direction (0 equals write transfer, 1
equals read transfer).
Each slave must have a unique address. An I
2
C master must not transmit its own slave address; it cannot
be master and slave at the same time.
The slave whose address matches that sent by the master pulls SDA low at the ninth serial clock (D) to
return an acknowledge bit.
25.3.3 Data Transfer
When successful slave addressing is achieved, data transfer can proceed (see E in Figure 25-7 ) on a
byte-by-byte basis in the direction specified by the R/W bit sent by the calling master.
Data can be changed only while SCL is low and must be held stable while SCL is high, as Figure 25-7
shows. SCL is pulsed once for each data bit, with the msb being sent first. The receiving device must
acknowledge each byte by pulling SDA low at the ninth clock; therefore, a data byte transfer takes nine
clock pulses. See
Figure 25-8 .
Figure 25-8. Data Transfer
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 9
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W XXX D7 D6 D5 D4 D3 D2 D1 D0
Calling Address
R/W ACK
Bit
Data Byte
No
ACK
Bit
STOP
Signal
lsb msb lsb msb
START
Signal
A
B
D C
E
F
Interrupt bit set
(Byte complete)
SCL
SDA
SCL held low while
Interrupt is serviced
1 2 3 4 5 6 7 8 9 5 6 7 8 4 3 2 1
Bit6 Bit4 Bit3 Bit2 Bit1 Bit5 Bit7
Bit0
Bit6 Bit4 Bit3 Bit2 Bit1 Bit5 Bit0 Bit7
START
Signal
ACK from
Receiver
STOP No
ACK Bit
Data Byte Slave Address
R/W
Signal
Interrupt Bit Set
(Byte Complete)
9
SCL
SDA
SCL held low while
Interrupt is serviced