11 psc3 pin assignment register (par_psc3), Psc3 pin assignment register (par_psc3) -27 – Freescale Semiconductor MCF5480 User Manual
Page 399
Memory Map/Register Definition
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor
15-27
15.3.2.11 PSC3 Pin Assignment Register (PAR_PSC3)
The PAR_PSC3 register controls the functions of the PSC3 pins. The PAR_PSC3 register is read/write.
3–2
PAR_PCIBR1 PCIBR1 Pin Assignment. Configures the PCIBR1 pin for one of its primary functions or GPIO.
0X PCIBR1 pin configured for general purpose I/O (PPCIREQ1)
10 PCIBR1 pin configured for GP timer TIN1 function
11 PCIBR1 pin configured for PCIBR1 function
1–0
PAR_PCIBR0 PCIBR0 Pin Assignment. Configures the PCIBR0 pin for one of its primary functions or GPIO.
0X PCIBR0 pin configured for general purpose I/O (PPCIREQ0)
10 PCIBR0 pin configured for GP timer TIN0 function
11 PCIBR0 pin configured for PCIBR0 function
7
6
5
4
3
2
1
0
R
PAR_CTS3
PAR_RTS3
PAR_RXD3
PAR_TXD3
0
0
W
Reset
0
0
0
0
0
0
0
0
Reg
Addr
MBAR + 0xA4C (PAR_PSC3)
Figure 15-28. PSC3 Pin Assignment Register (PAR_PCS3)
Table 15-30. PAR_PSC3 Descriptions
Bits
Name Description
7–6
PAR_CTS3 PSC3CTS pin assignment. Configures the PSC3CTS pin for one of its primary functions or general
purpose I/O.
0X PSC3CTS pin configured for general purpose I/O (PPSC3PSC27)
10 PSC3CTS pin configured for PSC3BCLK function
11 PSC3CTS pin configured for PSC3CTS function
5–4
PAR_RTS3 PSC3RTS pin assignment. Configures the PSC3RTS pin for one of its primary functions or general
purpose I/O.
0X PSC3RTS pin configured for general purpose I/O (PPSC3PSC26)
10 PSC3RTS pin configured for PSC3FSYNC function
11 PSC3RTS pin configured for PSC3RTS function
3
PAR_RXD3 PSC3RXD pin assignment. Configures the PSC3RXD pin for its primary function or general purpose
I/O.
0 PSC3RXD pin configured for general purpose I/O (PPSC3PSC25)
1 PSC3RXD pin configured for PSC3RXD function
2
PAR_TXD3 PSC3TXD pin assignment. Configures the PSC3TXD pin for its primary function or general purpose
I/O.
0 PSC3TXD pin configured for general purpose I/O (PPSC3PSC24)
1 PSC3TXD pin configured for PSC3TXD function
1–0
—
Reserved, should be cleared.
Table 15-29. PAR_PCIBR Field Descriptions (Continued)
Bits
Name
Description