Freescale Semiconductor MCF5480 - Manual (Page 428)

MCF548x Reference Manual, Rev. 3
17-12 Freescale Semiconductor
17.6 Functional Description
17.6.1 Data Transfer Operation
Data transfers between the MCF548x and other devices involve the following signals:
• Address/data bus (AD[31:0])
• Control signals (ALE and TA)
• FBCSn
• OE
• BE/BWE[3:0]
• Attribute signals (R/W, TBST, TSIZ[1:0])
The address and write data (AD[31:0]), R/W, ALE, FBCSn, and all attribute signals change on the rising
edge of the clock. Read data is registered in the MCF548x on the rising edge of the clock.
The MCF548x FlexBus supports byte, word, and longword operand transfers and allows accesses to 8-,
16-, and 32-bit data ports.Transfer parameters such as address setup and hold, port size, the number of wait
states for the external device being accessed, automatic internal transfer termination enable or disable, and
burst enable or disable are programmed in the chip-select control registers (CSCRs), Section 17.5.2.3,
“Chip-Select Control Registers (CSCR0–CSCR5).”
17.6.2 Data Byte Alignment and Physical Connections
The MCF548x aligns data transfers in FlexBus byte lanes, the number of lanes depending on the width of
the data port. Figure 17-6 shows the byte lanes that external memory should be connected to and the
sequential transfers if a longword is transferred for three port sizes. For example, an 8-bit memory should
be connected to the single lane AD[31:24]. A longword transfer through this 8-bit port takes four transfers
on AD[31:24], starting with the MSB and going to the LSB. A longword transfer through a 32-bit port
requires one transfer on each of the four byte lanes of the FlexBus.
3 BSTW Burst write enable. Specifies whether burst writes are used for memory associated with each
FBCSn.
0 Break data larger than the specified port size into individual port-sized, non-burst writes. For
example, a longword write to an 8-bit port takes four byte writes.
1 Enables burst write of data larger than the specified port size, including longword writes to 8 and
16-bit ports and word writes to 8-bit ports.
2–0 — Reserved, should be cleared.
Table 17-9. CSCRn Field Descriptions (Continued)
Bits Name Description