Freescale Semiconductor MCF5480 - Manual (Page 578)

MCF548x Reference Manual, Rev. 3
21-8 Freescale Semiconductor
21.3.2.2 FlexCAN Control Register (CANCTRL)
CANCTRL is defined for specific FlexCAN control features related to the CAN bus, such as bit-rate,
programmable sampling point within an Rx bit, loop back mode, listen-only mode, bus off recovery
behavior, and interrupt enabling (for example, bus off, error). It also determines the division factor for the
clock prescaler. Most of the fields in this register should only be changed while the module is disabled or
in freeze mode. Exceptions are the BOFFMSK, ERRMSK, and BOFFREC bits, which can be accessed at
any time.
22–4 — Reserved, should be cleared.
3–0 MAXMB Maximum number of message buffers. This 6-bit field defines the maximum number of message
buffers that will take part in the matching and arbitration process. The reset value (0xF) is equivalent
to 16 message buffer (MB) configuration. This field should be changed only while the module is in
freeze mode.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R PRESDIV RJW PSEG1 PSEG2
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R BOFF
MSK
ERR
MSK 0 LPB 0 0 0 0 SAMP BOFF
REC
TSYNC LBUF LOM PROPSEG
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reg
Addr
MBAR + 0xA004 (CANCTRL0); 0xA804 (CANCTRL1)
Figure 21-5. FlexCAN Control Register (CANCTRL)
Table 21-2. CANMCR Field Descriptions (Continued)
Bits Name Description
Maximum MBs in Use = MAXMB + 1