Freescale Semiconductor MCF5480 - Manual (Page 621)

Channels
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 22-19
store the ciphered data the EU outputs. Through a series of requests to the controller, the crypto-channel
decodes the contents of the descriptors to perform the following functions:
• Request assignment of one or more of the several EUs for the exclusive use of the channel.
• Request assignment of the MDEU when the descriptor header calls for multi-operation processing.
The MDEU will be configured to snoop input or output data intended for the primary assigned EU.
• Reset assigned EU(s).
• Automatically initialize mode registers in the assigned EU upon notification of completion of the
EU reset sequence.
• Automatically initialize the key and key size in the assigned EU after requesting a write to EU key
address space.
• Automatically initialize data size in the assigned EU before requesting a write to EU FIFO address
space.
• Transfer data packets (up to 32Kbytes) from system memory (master read) into assigned EU input
registers and FIFOs (EU write).
• Transfer data packets (up to 32Kbytes) from assigned EU output registers and FIFOs (EU read) to
system memory space (master write).
• Release assigned EU(s).
• Automatically fetch the next descriptor from system memory and start processing, when chaining
is enabled. Descriptor chains can be of unlimited size.
• Provide feedback to host, via interrupt, when a descriptor, or a chain of descriptors, has been
completely processed.
• Provide feedback to host, via modified descriptor header write back to system memory, when a
descriptor, or a chain of descriptors, has been completely processed.
• Provide feedback to host, via interrupt, when descriptor processing is halted due to an error.
• Detect static assignment of EU(s) by the controller and alter descriptor processing flow to skip EU
request and EU release steps. The channel will also automatically reset the EU_DONE interrupt
after receiving indication that processing of input data has been completed by the EU.
The channel will wait indefinitely for the controller to complete a requested activity before continuing to
process a descriptor.
22.7.1 Crypto-Channel Registers
Each crypto-channel contains the following registers:
• Crypto-channel configuration register (CCCRn)
• Crypto-channel pointer status register (CCPSRn)
• Current descriptor pointer register (CDPRn)
• Fetch register (FRn)
• Data packet descriptor buffer (CFBUFn)
22.7.1.1 Crypto-Channel Configuration Registers (CCCRn)
This register contains five operational bits permitting configuration of the crypto-channel as shown in
Figure 22-16 .