P. 22-21 – Freescale Semiconductor MCF5480 User Manual

Page 623

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Channels

MCF548x Reference Manual, Rev. 3

Freescale Semiconductor

22-21

Table 22-12

defines the burst size according to the value displayed in the BURST_SIZE field.

22.7.1.2

Crypto-Channel Pointer Status Registers (CCPSRHn and CCPSRLn)

These registers contain status fields and counters which provide the user with status information regarding

the channel’s actual processing of a given descriptor.

2

NT

Channel DONE Notification Type. This bit controls when the crypto-channel will generate
Channel DONE Notification.
0 End-of-chain: The crypto-channel will generate channel done notification (if enabled) when

it completes the processing of the last descriptor in a descriptor chain. The last descriptor
is identified by having NULL loaded into both the next descriptor pointer in the descriptor
buffer and the fetch register.

1 End-of-descriptor: The crypto-channel will generate channel done notification (if enabled) at

the end of every data descriptor it processes

Channel DONE notification can take the form of an interrupt or modified header writeback or
both, depending on the state of the CDIE and WE control bits.

1

CDIE

Channel DONE Interrupt Enable. This bit determines whether or not the crypto-channel is
allowed to assert interrupts to notify the host that the channel has completed descriptor
processing.
0 Channel Done interrupt disabled
1 Channel Done interrupt enabled
When CDIE is set, the NT control bit determines when the CHANNEL_DONE interrupt is
asserted. Channel error interrupts are asserted as soon as the error is detected.

0

RST

Reset Crypto-Channel. This bit allows for a software reset of the crypto-channel.
0 Automatically cleared by the crypto-channel when reset sequence is complete.
1 Reset the registers and internal state of the crypto-channel, any EU assigned to the

crypto-channel and the controller state associated with the crypto-channel.

Table 22-12. Burst Size Definition

Value

Number of Longwords in Burst

000

2

001

8

010

16

011

24

100

32

101

40

110

48

111

56

Table 22-11. CCCRn Field Descriptions (Continued)

Bits

Name

Description

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